DS34C86T
www.ti.com SNLS379C – MAY 1998 – REVISED APRIL 2013 DS34C86T Quad CMOS Differential Line Receiver
Check for Samples: DS34C86T FEATURES DESCRIPTION The DS34C86T is a quad differential line receiver
designed to meet the RS-422, RS-423, and Federal
Standards 1020 and 1030 for balanced and
unbalanced digital data transmission, while retaining
the low power characteristics of CMOS. 1 2 CMOS Design for Low Power
В±0.2V Sensitivity Over the Input Common
Mode Voltage Range
Typical Propagation Delays: 19 ns
Typical Input Hysteresis: 60 mV
Inputs Won't Load Line when VCC = 0V
Meets the Requirements of EIA Standard RS422
TRI-STATE Outputs for System Bus
Compatibility
Available in Surface Mount
Open Input Failsafe Feature, Output High for
Open Input The DS34C86T has an input sensitivity of 200 mV
over the common mode input voltage range of В±7V.
Hysteresis is provided to improve noise margin and
discourage output instability for slowly changing input
waveforms.
The DS34C86T features internal pull-up and pulldown resistors which prevent output oscillation on …
