Datasheet Texas Instruments ADS7871IDBG4 — Ficha de datos

FabricanteTexas Instruments
SerieADS7871
Numero de parteADS7871IDBG4
Datasheet Texas Instruments ADS7871IDBG4

DAS 48KSPS de 14 bits con ADC, MUX, PGA y referencia interna 28-SSOP -40 a 85

Hojas de datos

ADS7871: 14-Bit A/D Converter, MUX, PGA & Internal Reference DAQ System datasheet
PDF, 951 Kb, Revisión: C, Archivo publicado: oct 4, 2004
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin28
Package TypeDB
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY50
CarrierTUBE
Device MarkingADS7871
Width (mm)5.3
Length (mm)10.2
Thickness (mm)1.95
Pitch (mm).65
Max Height (mm)2
Mechanical DataDescargar

Paramétricos

# Input Channels8
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)4 +/-LSB
Input Range(Max)5.5 V
Input TypeDifferential,Single-Ended
Integrated FeaturesOscillator,PGA
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupSSOP
Package Size: mm2:W x L28SSOP: 80 mm2: 7.8 x 10.2(SSOP) PKG
Power Consumption(Typ)8.5 mW
RatingCatalog
Reference ModeExt,Int
Resolution14 Bits
SINADN/A dB
Sample Rate (max)48kSPS SPS
Sample Rate(Max)0.048 MSPS
THD(Typ)N/A dB

Plan ecológico

RoHSObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)