Datasheet Texas Instruments ADS7823EB/250 — Ficha de datos

FabricanteTexas Instruments
SerieADS7823
Numero de parteADS7823EB/250
Datasheet Texas Instruments ADS7823EB/250

Convertidor analógico a digital de muestreo de 12 bits de baja potencia, serie I2C, 8-VSSOP

Hojas de datos

ADS7823: 12-Bit, Sampling Analog-to-Digital Converter with I2C Interface datasheet
PDF, 630 Kb, Revisión: B, Archivo publicado: agosto 27, 2003
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

Pin8
Package TypeDGK
Industry STD TermVSSOP
JEDEC CodeR-PDSO-G
Package QTY250
CarrierSMALL T&R
Device MarkingB23
Width (mm)3
Length (mm)3
Thickness (mm).97
Pitch (mm).65
Max Height (mm)1.07
Mechanical DataDescargar

Paramétricos

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)4.75 V
INL(Max)1 +/-LSB
Input Range(Max)5.25 V
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceI2C
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVSSOP
Package Size: mm2:W x L8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)1.2 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
SINADN/A dB
SNR72 dB
Sample Rate (max)50kSPS SPS
Sample Rate(Max)0.05 MSPS
THD(Typ)-82 dB

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADS7823-28EVM
    ADS7823-28EVM Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)