Datasheet Texas Instruments DAC5662IPFB — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | DAC5662 |
| Numero de parte | DAC5662IPFB |
Convertidor digital a analógico (DAC) de doble canal, 12 bits, 275-MSPS 48-TQFP -40 a 85
Hojas de datos
Dual, 12-Bit, 275 MSPS Digital-to-Analog Converter datasheet
PDF, 725 Kb, Revisión: B, Archivo publicado: mayo 14, 2009
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | Sí |
Embalaje
| Pin | 48 |
| Package Type | PFB |
| Industry STD Term | TQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 250 |
| Carrier | JEDEC TRAY (10+1) |
| Device Marking | DAC5662I |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Descargar |
Paramétricos
| Architecture | Current Source |
| DAC Channels | 2 |
| Interface | Parallel CMOS |
| Interpolation | 1x |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 330 mW |
| Rating | Catalog |
| Resolution | 12 Bits |
| SFDR | 81 dB |
| Sample / Update Rate | 275 MSPS |
Plan ecológico
| RoHS | Obediente |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: DAC5652EVM
DAC5652 Dual-Channel, 10-Bit, 275-MSPS Digital-to-Analog Converter Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños) - Evaluation Modules & Boards: DAC5662EVM
DAC5662 Dual-Channel, 12-Bit, 275-MSPS Digital-to-Analog Converter Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños) - Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACsPDF, 617 Kb, Archivo publicado: oct 4, 2009
- Passive Terminations for Current Output DACsPDF, 244 Kb, Archivo publicado: nov 10, 2008
The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the necessary dc bias levels and correct effective impedance load to keep the output voltage within the compliance levels. This ensures that the maximum output signal amplitude and optimum ac performance - High Speed Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Kb, Revisión: A, Archivo publicado: oct 23, 2012
- Q4 2009 Issue Analog Applications JournalPDF, 1.5 Mb, Archivo publicado: oct 4, 2009
- Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Kb, Archivo publicado: jun 21, 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA
Linea modelo
Serie: DAC5662 (3)
- DAC5662IPFB DAC5662IPFBR DAC5662IPFBRG4
Clasificación del fabricante
- Semiconductors > Data Converters > Digital-to-Analog Converters (DACs) > High Speed DACs (>10MSPS)