Datasheet Texas Instruments ADS774KU/1K — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADS774 |
| Numero de parte | ADS774KU/1K |
Convertidor A / D CMOS de muestreo compatible con microprocesador 28-SOIC -40 a 85
Hojas de datos
Microprocessor-Compatible Sampling CMOS A/D Converter datasheet
PDF, 935 Kb, Archivo publicado: sept 27, 2000
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 28 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Device Marking | ADS774KU |
| Width (mm) | 7.5 |
| Length (mm) | 17.9 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Descargar |
Paramétricos
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 4.5 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 4.5 V |
| INL(Max) | 0.5 +/-LSB |
| Input Range(Max) | 10 V |
| Input Range(Min) | -10 V |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) PKG |
| Power Consumption(Typ) | 75 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 12 Bits |
| SINAD | N/A dB |
| SNR | 72 dB |
| Sample Rate (max) | 117kSPS SPS |
| Sample Rate(Max) | 0.117 MSPS |
| THD(Typ) | -77 dB |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
- CDAC Architecture Gives ADC574 Pinout /Sampling, Low Power, New Input RangesPDF, 54 Kb, Archivo publicado: sept 27, 2000
This application note compares basic current-mode successive approximation A/Ds with CDAC-based architectures, and shows how adding a resistor divider network to the CDAC input permits the Burr-Brown ADS574 and ADS774 to fit existing ADC574 sockets. It then goes on to descibe some new analog input voltage ranges available on these parts due to the resistor network and CDAC approach. - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Complete Temp Data Acquisition System From a Single +5V SupplyPDF, 68 Kb, Archivo publicado: oct 2, 2000
The CMOS ADS574 and ADS774 are drop-in replacements for industry standard ADC574 analog-to-digital converter, offering lower power and the capability to operate from a single +5V supply. The switched capacitor array architecture (CDAC), with the input resistor divider network to provide ADC574 input ranges, also allow the new parts to handle additional input ranges, including a 0V to 5V range. Thi - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Linea modelo
Serie: ADS774 (9)
Clasificación del fabricante
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)