Datasheet Texas Instruments SN74LVT125QPWREP — Ficha de datos

Producto mejorado 3.3-V Abt Buffers cuádruples de bus con salidas de 3 estados 14-TSSOP -40 a 125

Hojas de datos

PDF, 485 Kb, Revisión: A, Archivo publicado: mayo 17, 2005

Extracto del documento

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

Bits	4
Input Type	TTL/CMOS
Operating Temperature Range	-40 to 125 C
Output Type	LVTTL
Package Group	TSSOP
Package Size: mm2:W x L	14TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG
Rating	HiRel Enhanced Product
Schmitt Trigger	No
Technology Family	LVT
VCC(Max)	3.6 V
VCC(Min)	2.7 V
Voltage(Nom)	3.3 V

RoHS

Obediente

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LVT Family Characteristics (Rev. A)
PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
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LVT-to-LVTH Conversion
PDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Serie: SN74LVT125-EP (2)

Semiconductors > Space & High Reliability > Logic Products > Buffers/Drivers/Transceivers > Buffer Drivers