Datasheet Texas Instruments ADS8343EB — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADS8343 |
| Numero de parte | ADS8343EB |
Convertidor analógico a digital de muestreo de salida serie de 4 canales y 16 bits 16-SSOP -40 a 85
Hojas de datos
ADS8343: 16-Bit, 4-Channel Serial Output Sampling Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, Revisión: C, Archivo publicado: abr 15, 2003
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 16 | 16 | 16 |
| Package Type | DBQ | DBQ | DBQ |
| Industry STD Term | SSOP | SSOP | SSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 75 | 75 | 75 |
| Carrier | TUBE | TUBE | TUBE |
| Device Marking | ADS | B | 8343E |
| Width (mm) | 3.9 | 3.9 | 3.9 |
| Length (mm) | 4.9 | 4.9 | 4.9 |
| Thickness (mm) | 1.5 | 1.5 | 1.5 |
| Pitch (mm) | .64 | .64 | .64 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 |
| Mechanical Data | Descargar | Descargar | Descargar |
Paramétricos
| # Input Channels | 4 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 6 +/-LSB |
| Input Range(Max) | 5.25 V |
| Input Type | Differential,Single-Ended |
| Integrated Features | N/A |
| Interface | Serial |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SSOP |
| Package Size: mm2:W x L | 16SSOP: 19 mm2: 3.9 x 4.9(SSOP) PKG |
| Power Consumption(Typ) | 3.2 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 16 Bits |
| SINAD | N/A dB |
| SNR | 86 dB |
| Sample Rate (max) | 100kSPS SPS |
| Sample Rate(Max) | 0.1 MSPS |
| THD(Typ) | -95 dB |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
Linea modelo
Serie: ADS8343 (5)
- ADS8343E ADS8343E/2K5 ADS8343EB ADS8343EBG4 ADS8343EG4
Clasificación del fabricante
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)