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Hojas de datosConversores analógicos a digitales - ADCTexas InstrumentsADC12D1800RF
ADC12D1800RFIUT

Datasheet Texas Instruments ADC12D1800RFIUT — Ficha de datos

FabricanteTexas Instruments
SerieADC12D1800RF
Numero de parteADC12D1800RFIUT
Datasheet Texas Instruments ADC12D1800RFIUT

12 bits, doble 1.8-GSPS o simple 3.6-SPS, convertidor analógico a digital de muestreo de RF (ADC) 292-BGA -40 a 85

Hojas de datos

Descargar
ADC12D1800RF 12-Bit, Single 3.6 GSPS RF Sampling ADC datasheet
PDF, 3.6 Mb, Revisión: J, Archivo publicado: nov 11, 2014
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin292
Package TypeNXA
Industry STD TermBGA
JEDEC CodeS-PBGA-N
Package QTY40
CarrierJEDEC TRAY (10+1)
Device MarkingADC12D1800RFIUT
Width (mm)27
Length (mm)27
Thickness (mm)2.38
Pitch (mm)1.27
Max Height (mm)2.4
Mechanical DataDescargar

Paramétricos

# Input Channels2,1
Analog Input BW2700 MHz
ArchitectureFolding Interpolating
DNL(Max)0.4 +/-LSB
DNL(Typ)0.4 +/-LSB
ENOB9.3 Bits
INL(Max)2.5 +/-LSB
INL(Typ)2.5 +/-LSB
Input BufferYes
Input Range0.8 Vp-p
InterfaceParallel LVDS
Operating Temperature Range-40 to 85 C
Package GroupBGA
Package Size: mm2:W x L292BGA: 729 mm2: 27 x 27(BGA) PKG
Power Consumption(Typ)4400 mW
RatingCatalog
Reference ModeInt
Resolution12 Bits
SFDR68.1 dB
SINAD57.7 dB
SNR58.6 dB
Sample Rate(Max)1800,3600 MSPS

Plan ecológico

RoHSSee ti.com

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADC-WB-BB
    ADC Wide Band Balun Board
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: ADC12D1800RFRB
    12-Bit, Dual 1.8 GSPS or Single 3.6 GSPS A/D Converter Reference Board
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: ADCRF2LA
    The ADCRF2LA FMC to Logic Analyzer Adapter Board for the ADC12D1x00RFRB
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: ADC-LD-BB
    ADC Low Distortion Balun Board
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: TC1-DESIQ-SBB
    TC1 DESIQ Single Balun Board
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Descargar
    Signal Chain Noise Figure Analysis
    PDF, 615 Kb, Archivo publicado: oct 29, 2014
  • Descargar
    Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs
    PDF, 621 Kb, Archivo publicado: dic 7, 2015
  • Descargar
    Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
    PDF, 943 Kb, Archivo publicado: agosto 6, 2014
  • Descargar
    AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)
    PDF, 60 Kb, Revisión: C, Archivo publicado: mayo 1, 2013
    In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development.
  • Descargar
    AN-2177 Using the LMH6554 as a ADC Driver (Rev. A)
    PDF, 1.7 Mb, Revisión: A, Archivo publicado: abr 26, 2013
    This application report discusses the use of the Texas Instruments LMH6554 as an ADC driver.
  • Descargar
    From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
    PDF, 392 Kb, Archivo publicado: dic 18, 2012
    For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
  • Descargar
    AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
    PDF, 169 Kb, Revisión: G, Archivo publicado: feb 3, 2017
  • Descargar
    Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat
    PDF, 720 Kb, Archivo publicado: dic 9, 2013
    The SFDR performance of an ADC is limited by the largest spur in the spectrum from DC to Fs / 2. These spurs can either be reduced or avoided entirely for maximum SFDR performance, based on the application. This reference design explores the reason behind spurs in the 10-bit and 12-bit GSPS ADCfamily. The specific products covered are: ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12

Linea modelo

Serie: ADC12D1800RF (2)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)