Datasheet Texas Instruments TMSC6701GJC16719V — Ficha de datos

FabricanteTexas Instruments
SerieTMS320C6701
Numero de parteTMSC6701GJC16719V
Datasheet Texas Instruments TMSC6701GJC16719V

Procesador de señal digital de punto flotante 352-FCBGA 0 a 0

Hojas de datos

TMS320C6701 Floating-Point DSP datasheet
PDF, 958 Kb, Revisión: F, Archivo publicado: marzo 1, 2004
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin352352352
Package TypeGJCGJCGJC
Industry STD TermFCBGAFCBGAFCBGA
JEDEC CodeS-PBGA-NS-PBGA-NS-PBGA-N
Package QTY242424
CarrierJEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)
Device Marking@ 1998 TITMS320C6701GJC320C6701
Width (mm)353535
Length (mm)353535
Thickness (mm)333
Pitch (mm)1.271.271.27
Max Height (mm)3.53.53.5
Mechanical DataDescargarDescargarDescargar

Paramétricos

DSP1 C67x
RatingCatalog

Plan ecológico

RoHSSee ti.com

Kits de diseño y Módulos de evaluación

  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
    XDS560v2 System Trace USB Debug Probe
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: TMDSDSK6713
    TMS320C6713 DSP Starter Kit (DSK)
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
    XDS560v2 System Trace USB & Ethernet Debug Probe
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • How to Begin Development Today w/ High Performance Floating Point TMS320C67x DSP
    PDF, 111 Kb, Archivo publicado: abr 23, 2003
    This application report describes how you can begin development now for the Texas Instruments (TIВ™) TMS320C67x generation of high-performance digital signal processors (DSPs). Because of the compatibility between TMS320C6000 generation devices, existing C6000 software tools and development platforms can be used to develop code for the C67x and other future devices. This capability allows for s
  • TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec (Rev. A)
    PDF, 151 Kb, Revisión: A, Archivo publicado: jul 24, 2001
    This application note describes how a multimedia audio codec can be interfaced to the TMS320C6201/C6701 DSPs. Although this application report uses the CS4231A audio codec as an example, a part that is obsolete, this application note can be used as a reference guide in interfacing similar audio codecs to the TMS320C6000? McBSP. Cirrus Logic offers the CS4235 CrystalClear? ISA audio device that p
  • TMS320C62x/C67x Power Consumption Summary (Rev. C)
    PDF, 114 Kb, Revisión: C, Archivo publicado: jul 30, 2002
    This document discusses the power consumption of the Texas Instruments TMS320C6201B, TMS320C6701, TMS320C6202, TMS320C6202B, TMS320C6203, TMS320C6204, TMS320C6205, TMS320C6211, and TMS320C6711 digital signal processors (DSPs) for typical applications. The C6201B, C6701, C6202, C6211, and C6711 DSPs are manufactured on TI's advanced 0.18-micron process and operate with a core voltage of 1.8 V. The
  • TMS320C620x/TMS3206701 DMA and CPU: Data Access Performance (Rev. A)
    PDF, 125 Kb, Revisión: A, Archivo publicado: agosto 16, 2000
    In a real-time system, data flow is important to understand and control to achieve high performance. By analyzing the timing characteristics for accessing data and switching between data requestors, it is possible to maximize the achievable bandwidth in any system. This application note provides relevant information for TMS320C62x devices (such as the C6201(B), C6202(B), C6203, C6204, C6205, and C
  • TMS320C6000 Memory Test (Rev. A)
    PDF, 383 Kb, Revisión: A, Archivo publicado: feb 19, 2002
    This set of programs has been compiled to provide a way to verify the integrity of internal DSP memory and external system memory for all devices currently in the TMS320C6000в„ў (C6000) family. Included with the memory test are all source files, the Code Composer Studio? project file, and the linker command file. The source files contain the necessary parameters to test all devices within the
  • TMS320C6000 DMA Example Applications (Rev. A)
    PDF, 864 Kb, Revisión: A, Archivo publicado: abr 10, 2002
    The TMS320C6000? on-chip direct memory access (DMA) controller from Texas Instruments is used to transfer data between two locations in the memory map in the background of CPU operation. Typically, the DMA is used to:Transfer blocks of data between external and internal data memoriesRestructure portions of internal data memoryContinually service a peripheralPage program s
  • TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C)
    PDF, 248 Kb, Revisión: C, Archivo publicado: abr 17, 2002
    This application report describes an interface between the Texas Instruments TMS320C6000в„ў DSP host port and the PLX Technology PCI9050 (PCI9052), the PCI interface chip. The PCI9052 is functionally the same as the PCI9050. The only difference between these two devices is that the PCI9052 is somewhat faster than the PCI9050.This application report includes a diagram showing connections be
  • TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A)
    PDF, 272 Kb, Revisión: A, Archivo publicado: agosto 31, 2001
    This application report describes the interface between the Texas Instruments (TI) TMS320C6000в„ў digital signal processor (DSP) host port and the Intel 80960 microprocessor. The document includes schematics showing connections between the two devices, PAL equations, and verification that timing requirements are met for each device (tables and timing diagrams).
  • TMS320C6000 Host Port to MC68360 Interface (Rev. A)
    PDF, 261 Kb, Revisión: A, Archivo publicado: sept 30, 2001
    This application report describes an interface between the Motorola MC68360 quad integrated communication controller (QUICC) and the host port interface (HPI) of a TMS320C6000в„ў (C6000в„ў) digital signal processor (DSP) device. This includes a schematic showing connections between the two devices and verification that timing requirements are met for each device (tables and timing diagrams
  • TMS320C6000 Host Port to MPC860 Interface (Rev. A)
    PDF, 311 Kb, Revisión: A, Archivo publicado: jun 21, 2001
    This application report describes an interface between the Motorola MPC860 microprocessor and the host port interface (HPI) of a Texas Instruments TMS320C6000в„ў (C6000в„ў) digital signal processor (DSP) device. This document includes a schematic showing connections between the two devices, PAL equations, and verification that timing requirements are met for each device (tables and timing
  • Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A)
    PDF, 309 Kb, Revisión: A, Archivo publicado: sept 30, 2001
    This application report describes the architecture and capabilities of the AMCC S5933 PCI controller and how it can be interfaced to the TMS320C6201 digital signal processor (DSP). The DSP's host port interface (HPI) can be a PCI target, and its external memory interface (EMIF) can be used to support PCI bus mastering. Details on the signals and logic required to implement both PCI slave and maste
  • TMS320C6000 System Clock Circuit Example (Rev. A)
    PDF, 129 Kb, Revisión: A, Archivo publicado: agosto 15, 2001
    This document describes how to provide the Texas Instruments TMS320C6000в„ў DSP with a system clock. All of the clocks internal to the C6000в„ў are generated from a single source through the CLKIN pin. This source clock for the device is an external signal that, depending on the clock mode, either drives the on-chip Phase-Locked Loop (PLL) circuit, which multiplies the source clock in freq
  • TMS320C6000 McBSP: I2S Interface
    PDF, 93 Kb, Archivo publicado: sept 8, 1999
    This document describes how to use the multichannel buffered serial port (McBSP) in the Texas Instruments (TI)(TM) TMS320C6000 digital signal processors (DSP) to interface with devices that conform to the Inter-IC Sound (I2S) specification. I2S is a protocol for transmitting two channels of digital audio data over a single serial connection.The flexible McBSP in the TMS320C6000 supports the I
  • TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B)
    PDF, 87 Kb, Revisión: B, Archivo publicado: jun 4, 2002
    This document describes how the multichannel buffered serial ports (McBSPs) in the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) are used to communicate to a single-rate Serial Telecom (ST)-BUS-compliant device.The McBSP receives the framing signal, clock, and data from the ST-BUSв„ў device and processes them to generate internal frame syncs and clocks for correct data
  • TMS320C6000 Board Design for JTAG (Rev. C)
    PDF, 89 Kb, Revisión: C, Archivo publicado: abr 2, 2002
    Designing a TMS320C6000в„ў DSP board to utilize all of the functionality of the JTAG scan path is a simple process, but a few considerations must be taken into account. The default state of the emulation signals determines whether the JTAG port is used for emulation or for boundary scan. It is therefore necessary to provide flexibility in the design to accommodate those modes that are desired.
  • TMS320C6000 McBSP Initialization (Rev. C)
    PDF, 232 Kb, Revisión: C, Archivo publicado: marzo 8, 2004
    The TMS320C6000? multichannel buffered serial port (McBSP) can operate in a variety of modes, as per application requirements. For proper operation, the serial port must be initialized in a specific order. This document describes the initialization steps necessary when either the (E)DMA or the CPU is used to service the McBSP data. Typically, the (E)DMA is used to perform read/write transfers from
  • Using a TMS320C6000 McBSP for Data Packing (Rev. A)
    PDF, 257 Kb, Revisión: A, Archivo publicado: oct 31, 2001
    This application report describes how to use the multichannel buffered serial port (McBSP) in the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) for data packing. Data packing involves moving either multiple successive 8-bit elements to/from the McBSP as a single 16/24/32-bit element or multiple successive 16-bit words to/from the McBSP as a single 32-bit word.The McBSP
  • Circular Buffering on TMS320C6000 (Rev. A)
    PDF, 172 Kb, Revisión: A, Archivo publicado: sept 12, 2000
    This application report explains how circular buffering is implemented on the TMS320C6000? devices. Circular buffering helps to implement finite impulse response (FIR) filters efficiently. Filters require delay lines or buffers of past (and current) samples. Circular addressing simplifies the manipulation of pointers in accessing the data samples.This application report addresses the following
  • TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A)
    PDF, 118 Kb, Revisión: A, Archivo publicado: agosto 31, 2001
    Interfacing external asynchronous static RAM (ASRAM) to the Texas Instruments (TIв„ў) TMS320C6000 series of digital signal processors (DSPs) is simple compared to previous generations of TI DSPs, thanks to the advanced external memory interface (EMIF). The EMIF provides a glueless interface to a variety of external memory devices.This document describes:EMIF control registers and ASR
  • TMS320C6000 McBSP as a TDM Highway (Rev. A)
    PDF, 313 Kb, Revisión: A, Archivo publicado: sept 11, 2000
    This document describes how the multichannel buffered serial ports (McBSP) in the TMS320C6000в„ў digital signal processors (DSP) are used to communicate on a time-division multiplexed (TDM) data highway.TDM provides multiple devices a time slot to perform data transfer. Thus, multiple users operate various channels; however, each user has a set of channel(s) assigned for transmission and re
  • TMS320C6000 u-Law and a-Law Companding with Software or the McBSP
    PDF, 150 Kb, Archivo publicado: feb 2, 2000
    This document describes how to perform data companding with the TMS320C6000(tm)digital signal processors(DSP). Companding refers to the compression and expansion of transfer data before and after transmission, respectively.The multichannel buffered serial port (McBSP) in the TMS320C6000 supports two companding formats: mu-Law and A-Law. Both companding formats are specified in the CCITT G.711
  • TMS320C6000 EMIF to External Flash Memory (Rev. A)
    PDF, 471 Kb, Revisión: A, Archivo publicado: feb 13, 2002
    Interfacing external flash memory to the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) is simple compared to previous generations of TI DSPs. The TMS320C6000 advanced external memory interface (EMIF) provides a glueless interface to a variety of external memory devices.This document describes the following:EMIF control registers and asynchronous interface signals<
  • TMS320C6000 C Compiler: C Implementation of Intrinsics
    PDF, 154 Kb, Archivo publicado: dic 7, 1999
    The first optimization step that you can perform on C source code for the TMS320C62xx is to use intrinsic operators. Intrinsics are used like functions and produce assembly language statements that would otherwise be inexpressible in C. The problem is that once you have performed the first optimization step, your C source code is no longer ANSI C compatible. The code proposed within this appli
  • TMS320C6000 McBSP: IOM-2 Interface (Rev. A)
    PDF, 284 Kb, Revisión: A, Archivo publicado: mayo 21, 2001
    This document describes how the multi-channel buffered serial port (McBSP) in the Texas Instruments (TI) TMS320C6000? (C6000?) digital signal processor (DSP) family is used to communicate to an ISDN Oriented Modular Interface Revision 2 (IOM-2) bus-compliant device. This document also describes the usage of McBSP registers and sample code to perform the above function.
  • TMS320C6000 Board Design: Considerations for Debug (Rev. C)
    PDF, 96 Kb, Revisión: C, Archivo publicado: abr 21, 2004
  • TMS320C6000 McBSP: Interface to SPI ROM (Rev. C)
    PDF, 99 Kb, Revisión: C, Archivo publicado: jun 30, 2001
    The TMS320C6000? (C6000?) Multichannel Buffered Serial Port (McBSP) is designed to interface to a device that supports synchronous Serial Peripheral Interface (SPI). This document describes the hardware interface between the McBSP and a SPI ROM. The McBSP operates as the master in a user-specified clock stop (CLKSTP) mode in order to communicate with the SPI ROM. The McBSP initialization and contr
  • TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)
    PDF, 833 Kb, Revisión: E, Archivo publicado: sept 4, 2007
    Interfacing external SDRAM to the Texas Instruments TMS320C6000™ digital signal processor (DSP) is simple, compared to previous generations of TI DSPs, because of the advanced external memory interface (EMIF). The EMIF is a glueless interface to a variety of external memory devices.This application report describes the EMIF’s control registers and SDRAM signals along with SDRAM function
  • TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D)
    PDF, 185 Kb, Revisión: D, Archivo publicado: abr 26, 2004
    Texas Instruments TMS320C6000в„ў digital signal processors (DSPs) provide a variety of boot configurations that determine which actions are performed after device reset, to prepare for initialization. The boot process is determined by latching the boot configuration settings at reset.The boot process performed by the DSP is to either load code from an external read-only memory (ROM) space
  • Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A)
    PDF, 296 Kb, Revisión: A, Archivo publicado: agosto 31, 2001
    This document describes how to use the mulit-channel buffered serial ports (McBSP) in the Texas Instruments (TI) TMS320C6000в„ў digital signal processor (DSP) as a high-speed data communication port.One McBSP of one C6000в„ў DSP device can be connected to a McBSP on another C6000 DSP device to serve as a high-speed data communication port. Typically, McBSPs of similar device numbers a
  • TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A)
    PDF, 240 Kb, Revisión: A, Archivo publicado: jul 23, 2001
    This document describes how to interface the multichannel buffered serial port (McBSP) in the TMS320C6000? digital signal processor (DSP) to a voice band audio processor (VBAP). The VBAP under discussion is the TI TLV320AC56, 3V, 2.048 MHz audio processor which is a m-law companding device. The interface is also applicable to TI?s TLV320AC57, an A-law companding audio processor.The highly
  • TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A)
    PDF, 289 Kb, Revisión: A, Archivo publicado: jul 10, 2001
    This document describes how to use the multichannel buffered serial ports (McBSPs) in the Texas Instruments TMS320C6000в„ў digital signal processor (DSP) as a digital controller for an audio codec 1997 device.The McBSP is connected to a stereo audio codec 1997 device. This application report uses the TLV320AIC27 audio codec (AIC27) as an example. The audio codec 1997 (AC'97) standard spec
  • Using IBIS Models for Timing Analysis (Rev. A)
    PDF, 301 Kb, Revisión: A, Archivo publicado: abr 15, 2003
    Today?s high-speed interfaces require strict timings and accurate system design. To achieve the necessary timings for a given system, input/output buffer information specification (IBIS) models must be used. These models accurately represent the device drivers under various process conditions. Board characteristics, such as impedance, loading, length, number of nodes, etc., affect how the device d
  • Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
    PDF, 127 Kb, Archivo publicado: mayo 20, 2007
    As integrated circuit (IC) components become more complex, the challenge of producing an end product with superior thermal performance increases. Thermal performance is a system level concern, impacted by IC packaging as well as by printed circuit board (PCB) design. This application report addresses the thermal considerations for the TMS320DM64xx, TMS320DM64x, and TMS320C6000в„ў DSP devices.
  • Introduction to TMS320C6000 DSP Optimization
    PDF, 535 Kb, Archivo publicado: oct 6, 2011
    The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then

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Clasificación del fabricante

  • Semiconductors > Processors > Digital Signal Processors > C6000 DSP > Other C6000 DSP