Datasheet Texas Instruments SN74LVTH162374KR — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN74LVTH162374 |
Numero de parte | SN74LVTH162374KR |
Flip-Flops tipo D de 16 bits ABT de 16 bits y 3.3 V con salidas de 3 estados MICROSTAR DE 56 BGA JUNIOR -40 a 85
Hojas de datos
SN54LVTH162374, SN74LVTH162374 datasheet
PDF, 942 Kb, Revisión: M, Archivo publicado: nov 18, 2006
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
Disponibilidad de muestra del fabricante | No |
Embalaje
Pin | 56 |
Package Type | GQL |
Industry STD Term | BGA MICROSTAR JUNIOR |
JEDEC Code | R-PBGA-N |
Width (mm) | 4.5 |
Length (mm) | 7 |
Thickness (mm) | .75 |
Pitch (mm) | .65 |
Max Height (mm) | 1 |
Mechanical Data | Descargar |
Reemplazos
Replacement | 74LVTH162374ZQLR |
Replacement Code | P |
Paramétricos
3-State Output | Yes |
Approx. Price (US$) | 0.52 | 1ku |
Bits(#) | 16 |
F @ Nom Voltage(Max)(Mhz) | 160 |
ICC @ Nom Voltage(Max)(mA) | 5 |
Input Type | TTL |
Operating Temperature Range(C) | -40 to 85 |
Output Drive (IOL/IOH)(Max)(mA) | 12/-12 |
Output Type | TTL |
Package Group | BGA MICROSTAR JUNIOR |
Package Size: mm2:W x L (PKG) | 56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR) |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | LVT |
VCC(Max)(V) | 3.6 |
VCC(Min)(V) | 2.7 |
Voltage(Nom)(V) | 3.3 |
tpd @ Nom Voltage(Max)(ns) | 5.3 |
Plan ecológico
RoHS | Desobediente |
Pb gratis | No |
Notas de aplicación
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - Bus-Hold CircuitPDF, 418 Kb, Archivo publicado: feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
Linea modelo
Serie: SN74LVTH162374 (7)
Clasificación del fabricante
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop