Datasheet Texas Instruments ADS8382IBRHPTG4 — Ficha de datos

FabricanteTexas Instruments
SerieADS8382
Numero de parteADS8382IBRHPTG4
Datasheet Texas Instruments ADS8382IBRHPTG4

ADC serie 600KSPS de 18 bits con referencia y pseudo bipolar, entrada totalmente diferencial 28-VQFN -40 a 85

Hojas de datos

ADS8382: 18-Bit 600-kHz Unipolar Differential Input Micropower Sampling ADC datasheet
PDF, 1.7 Mb, Revisión: B, Archivo publicado: nov 3, 2004
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin2828
Package TypeRHPRHP
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingBADS8382I
Width (mm)66
Length (mm)66
Thickness (mm).9.9
Pitch (mm).65.65
Max Height (mm)11
Mechanical DataDescargarDescargar

Paramétricos

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)3 +/-LSB
Input Range(Max)4.2 V
Input Range(Min)-4.2 V
Input TypeDifferential
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L28VQFN: 36 mm2: 6 x 6(VQFN) PKG
Power Consumption(Typ)115 mW
RatingCatalog
Reference ModeExt,Int
Resolution18 Bits
SINAD96 dB
SNR96 dB
Sample Rate (max)600kSPS SPS
Sample Rate(Max)0.6 MSPS
THD(Typ)-116 dB

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADS8382EVM
    ADS8382 Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Using the ADS8382 With the TMS320C6713 DSP
    PDF, 193 Kb, Archivo publicado: marzo 24, 2005
    This application report presents a solution to interfacing the ADS8382 18-bit, 600-KSPS serial interface converter to the TMS320C6713 DSP. The hardware solution is made up of existing hardware: the ADS8382EVM, 'C6713 DSK, and 5-6K Interface Board. The software demonstrates how to use an EDMA and Timer peripheral to collect data at 598 kHz. Discussed also are some of the key points to remember when
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: ADS8382 (3)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)