Datasheet Texas Instruments SN74ALVTH16821DLR — Ficha de datos

Fabricante	Texas Instruments
Serie	SN74ALVTH16821
Numero de parte	SN74ALVTH16821DLR

Chanclas de interfaz de bus de 2.5-V / 3.3-V de 20 bits con salidas de 3 estados 56-SSOP -40 a 85

Hojas de datos

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PDF, 461 Kb, Revisión: E, Archivo publicado: enero 8, 1999

Extracto del documento

Precios

Estado

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

Embalaje

Pin	56
Package Type	DL
Industry STD Term	SSOP
JEDEC Code	R-PDSO-G
Package QTY	1000
Carrier	LARGE T&R
Device Marking	ALVTH16821
Width (mm)	7.49
Length (mm)	18.41
Thickness (mm)	2.59
Pitch (mm)	.635
Max Height (mm)	2.79
Mechanical Data	Descargar

Paramétricos

3-State Output	Yes
Bits	20
F @ Nom Voltage(Max)	250 Mhz
ICC @ Nom Voltage(Max)	5 mA
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	64/-32 mA
Package Group	SSOP
Package Size: mm2:W x L	56SSOP: 191 mm2: 10.35 x 18.42(SSOP) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	ALVT
VCC(Max)	3.6 V
VCC(Min)	2.3 V
Voltage(Nom)	2.5,3.3 V
tpd @ Nom Voltage(Max)	4.1,3.5 ns

Plan ecológico

RoHS

Obediente

Notas de aplicación

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Advanced Low-Voltage Technology
PDF, 59 Kb, Archivo publicado: jul 27, 1999
ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance.
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Bus-Hold Circuit
PDF, 418 Kb, Archivo publicado: feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
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16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
PDF, 209 Kb, Archivo publicado: mayo 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Linea modelo

Serie: SN74ALVTH16821 (4)

SN74ALVTH16821DL SN74ALVTH16821DLR SN74ALVTH16821GR SN74ALVTH16821VR

Clasificación del fabricante

Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop