Datasheet Texas Instruments ADS5423IPJYG4 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADS5423 |
| Numero de parte | ADS5423IPJYG4 |
Hojas de datos
ADS5423: 14-Bit 80 MSPS ADC (Rev. A)
PDF, 1.9 Mb, Revisión: A, Archivo publicado: enero 14, 2010
Precios
Estado
| Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 52 |
| Package Type | PJY |
| Industry STD Term | QFP |
| JEDEC Code | S-PQFP-G |
| Width (mm) | 10 |
| Length (mm) | 10 |
| Thickness (mm) | 1.4 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.6 |
| Mechanical Data | Descargar |
Reemplazos
| Replacement | ADS5423IPGP |
| Replacement Code | P |
Paramétricos
| # Input Channels | 1 |
| Analog Input BW(MHz) | 570 |
| Approx. Price (US$) | 44.00 | 1ku |
| Architecture | Pipeline |
| DNL(Max)(+/-LSB) | 0.5 |
| ENOB(Bits) | 12.2 |
| INL(Max)(+/-LSB) | 1.5 |
| Input Range | 2.2V (p-p) |
| Interface | Parallel LVDS Serial SPI Interface |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | HTQFP |
| Package Size(mm2=WxL) | 52HTQFP: 144 mm2: 12 x 12 |
| Power Consumption(Typ)(mW) | 1850 |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution(Bits) | 14 |
| SFDR(dB) | 93 |
| SINAD(dB) | 74.2 |
| SNR(dB) | 74.3 |
| Sample Rate (max)(SPS) | 80MSPS |
Plan ecológico
| RoHS | Desobediente |
| Pb gratis | No |
Kits de diseño y Módulos de evaluación
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Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- Clocking High-Speed Data ConvertersPDF, 310 Kb, Archivo publicado: enero 18, 2005
- High-Speed, Analog-to-Digital Converter BasicsPDF, 1.1 Mb, Archivo publicado: enero 11, 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant to high-speed, analog-to-digital converters (ADC). This document provides details on sampling theory, - Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, Revisión: A, Archivo publicado: mayo 22, 2015
ADS6129, ADS6149 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat - Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, Revisión: A, Archivo publicado: jul 19, 2013
ADS4149 Why Use Oversampling when Undersampling Can Do the Job? - Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Kb, Archivo publicado: abr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, Archivo publicado: jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of - Interleaving Analog-to-Digital ConvertersPDF, 64 Kb, Archivo publicado: oct 2, 2000
It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
AB-082 Principles of Data Acquisition and Conversion - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specificati - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
AB-084 Analog-to-Digital Grounding Practices Affect System Performance - What Designers Should Know About Data Converter DriftPDF, 95 Kb, Archivo publicado: oct 2, 2000
Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its oper
Linea modelo
Serie: ADS5423 (5)
- ADS5423IPGP ADS5423IPGPR ADS5423IPJY ADS5423IPJYG4 ADS5423IPJYRG4
Clasificación del fabricante
- Semiconductors > Data Converters > Analog to Digital Converter > High Speed ADC (>10MSPS)