Datasheet Texas Instruments CD4020BNSR — Ficha de datos
Fabricante | Texas Instruments |
Serie | CD4020B |
Numero de parte | CD4020BNSR |
Contador / divisor binario CMOS de 14 etapas Ripple-Carry 16-SO -55 a 125
Hojas de datos
Datasheet CD4020B, CD4024B, CD4040B
PDF, 1.6 Mb, Revisión: D, Archivo publicado: dic 11, 2003, Páginas: 25
CMOS Ripple-Carry Binary Counter/Dividers
CMOS Ripple-Carry Binary Counter/Dividers
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No |
Embalaje
Pin | 16 |
Package Type | NS |
Industry STD Term | SOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | CD4020B |
Width (mm) | 5.3 |
Length (mm) | 10.3 |
Thickness (mm) | 1.95 |
Pitch (mm) | 1.27 |
Max Height (mm) | 2 |
Mechanical Data | Descargar |
Paramétricos
Approx. price | 0.11 | 1ku US$ |
Bits | 12 |
F @ nom voltage(Max) | 8 MHz |
Function | Counter |
ICC @ nom voltage(Max) | 0.03 mA |
IOH(Max) | -1.5 mA |
IOL(Max) | 1.5 mA |
Operating temperature range | -55 to 125 C |
Package Group | PDIP|16,SO|16,TSSOP|16 |
Package size: mm2:W x L | See datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16) PKG |
Rating | Catalog |
Technology Family | CD4000 |
Type | Binary |
VCC(Max) | 18 V |
VCC(Min) | 3 V |
Voltage(Nom) | 5,10,15 V |
tpd @ nom Voltage(Max) | 160 ns |
Plan ecológico
RoHS | Obediente |
Pb gratis | Sí |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: 14-24-LOGIC-EVM
Generic Logic EVM Supporting 14 through 24 Pin PW; DB; D; DW; NS; P; N; and DGV Packages
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- Understanding Buffered and Unbuffered CD4xxxB Series Device CharacteristicsPDF, 188 Kb, Archivo publicado: dic 3, 2001
Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb - Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, Archivo publicado: jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
Linea modelo
Serie: CD4020B (8)
Clasificación del fabricante
- Semiconductors > Logic > Specialty logic > Counter/arithmetic/parity function