Datasheet Texas Instruments SN74LVT244BGQNR — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74LVT244B |
| Numero de parte | SN74LVT244BGQNR |
Hojas de datos
SN74LVT244B datasheet
PDF, 1.4 Mb, Revisión: J, Archivo publicado: sept 9, 2003
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 20 |
| Package Type | GQN |
| Industry STD Term | BGA MICROSTAR JUNIOR |
| JEDEC Code | R-PBGA-N |
| Width (mm) | 3 |
| Length (mm) | 4 |
| Thickness (mm) | .75 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1 |
| Mechanical Data | Descargar |
Reemplazos
| Replacement | SN74LVT244BZQNR |
| Replacement Code | P |
Paramétricos
| Approx. Price (US$) | 0.27 | 1ku |
| Bits(#) | 8 |
| F @ Nom Voltage(Max)(Mhz) | 160 |
| ICC @ Nom Voltage(Max)(mA) | 0.005 |
| Input Type | TTL/CMOS |
| Operating Temperature Range(C) | -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | -32/64 |
| Output Type | LVTTL |
| Package Group | BGA MICROSTAR JUNIOR SO SOIC SSOP TSSOP VQFN |
| Package Size: mm2:W x L (PKG) | 20BGA MICROSTAR JUNIOR: 12 mm2: 3 x 4(BGA MICROSTAR JUNIOR) 20VQFN: 16 mm2: 3.5 x 4.5(VQFN) 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) 20SO: 98 mm2: 7.8 x 12.6(SO) 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | LVT |
| VCC(Max)(V) | 3.6 |
| VCC(Min)(V) | 2.7 |
| Voltage(Nom)(V) | 3.3 |
| tpd @ Nom Voltage(Max)(ns) | 3.5 |
Plan ecológico
| RoHS | Desobediente |
| Pb gratis | No |
Notas de aplicación
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Linea modelo
Serie: SN74LVT244B (20)
- SN74LVT244BDB SN74LVT244BDBLE SN74LVT244BDBR SN74LVT244BDBRE4 SN74LVT244BDW SN74LVT244BDWG4 SN74LVT244BDWR SN74LVT244BDWRE4 SN74LVT244BDWRG4 SN74LVT244BGQNR SN74LVT244BNSR SN74LVT244BPW SN74LVT244BPWE4 SN74LVT244BPWG4 SN74LVT244BPWLE SN74LVT244BPWR SN74LVT244BPWRE4 SN74LVT244BPWRG4 SN74LVT244BRGYR SN74LVT244BZQNR
Clasificación del fabricante
- Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver