Datasheet Texas Instruments SN74ALVC00DGVR — Ficha de datos

Fabricante	Texas Instruments
Serie	SN74ALVC00
Numero de parte	SN74ALVC00DGVR

Quadruple 2-Input Positive-NAND Gate 14-TVSOP -40 a 85

Hojas de datos

Descargar

PDF, 868 Kb, Revisión: G, Archivo publicado: jun 29, 2004

Extracto del documento

Precios

Estado

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

Embalaje

Pin	14
Package Type	DGV
Industry STD Term	TVSOP
JEDEC Code	R-PDSO-G
Package QTY	2000
Carrier	LARGE T&R
Device Marking	VA00
Width (mm)	4.4
Length (mm)	3.6
Thickness (mm)	1.05
Pitch (mm)	.4
Max Height (mm)	1.2
Mechanical Data	Descargar

Paramétricos

Bits	4
F @ Nom Voltage(Max)	100 Mhz
ICC @ Nom Voltage(Max)	0.01 mA
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	24/-24 mA
Package Group	TVSOP
Package Size: mm2:W x L	14TVSOP: 23 mm2: 6.4 x 3.6(TVSOP) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	ALVC
VCC(Max)	3.6 V
VCC(Min)	1.65 V
Voltage(Nom)	1.8,2.5,2.7,3.3 V
tpd @ Nom Voltage(Max)	4.4,2.8,3.2,3 ns

Plan ecológico

RoHS

Obediente

Notas de aplicación

Descargar
TI SN74ALVC16835 Component Specification Analysis for PC100
PDF, 43 Kb, Archivo publicado: agosto 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
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16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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Understanding Advanced Bus-Interface Products Design Guide
PDF, 253 Kb, Archivo publicado: mayo 1, 1996

Linea modelo

Serie: SN74ALVC00 (10)

SN74ALVC00D SN74ALVC00DE4 SN74ALVC00DG4 SN74ALVC00DGVR SN74ALVC00DR SN74ALVC00DRG4 SN74ALVC00NSR SN74ALVC00PWR SN74ALVC00PWRE4 SN74ALVC00PWRG4

Clasificación del fabricante

Semiconductors > Logic > Gate > NAND Gate