Datasheet Texas Instruments SN74ALVC164245DGGR — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN74ALVC164245 |
Numero de parte | SN74ALVC164245DGGR |
Transceptor de cambio de nivel de 16 bits de 2.5 V a 3.3 V / 3.3-V a 5 V con salidas de 3 estados 48-TSSOP -40 a 85
Hojas de datos
SN74ALVC164245 16-Bit 2.5-V to 3.3-V or 3.3-V to 5-V Level-Shifting Transceiver With 3-State Outputs datasheet
PDF, 1.1 Mb, Revisión: Q, Archivo publicado: sept 27, 2016
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No |
Embalaje
Pin | 48 |
Package Type | DGG |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | ALVC164245 |
Width (mm) | 6.1 |
Length (mm) | 12.5 |
Thickness (mm) | 1.15 |
Pitch (mm) | .5 |
Max Height (mm) | 1.2 |
Mechanical Data | Descargar |
Paramétricos
Bits | 16 |
ICCA Static Current | 0.04 mA |
ICCB Static Current | 0.04 mA |
Package Group | TSSOP |
Package Size: mm2:W x L | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG |
Rating | Catalog |
Special Features | N/A |
Static Current | 0.04 mA |
VCCA(Max) | 3.3 V |
VCCA(Min) | 2.5 V |
VCCB(Max) | 5 V |
VCCB(Min) | 3.3 V |
Plan ecológico
RoHS | Obediente |
Notas de aplicación
- TI SN74ALVC16835 Component Specification Analysis for PC100PDF, 43 Kb, Archivo publicado: agosto 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T - Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families - Understanding Advanced Bus-Interface Products Design GuidePDF, 253 Kb, Archivo publicado: mayo 1, 1996
Linea modelo
Serie: SN74ALVC164245 (15)
Clasificación del fabricante
- Semiconductors > Logic > Voltage Level Translation > Application Specific Voltage Translation