Datasheet Texas Instruments ADS8323YB/250 — Ficha de datos

FabricanteTexas Instruments
SerieADS8323
Numero de parteADS8323YB/250
Datasheet Texas Instruments ADS8323YB/250

Convertidor analógico a digital pseudo bipolar, 16 bits, 500kSPS CMOS 32-TQFP -40 a 85

Hojas de datos

ADS8323: 16-Bit, 500kSPS, microPower Sampling Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, Revisión: C, Archivo publicado: enero 5, 2010
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin3232
Package TypePBSPBS
Industry STD TermTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingBA23Y
Width (mm)55
Length (mm)55
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDescargarDescargar

Paramétricos

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)4.75 V
INL(Max)4 +/-LSB
Input Range(Max)5.25 V
Input TypeDifferential
Integrated FeaturesN/A
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupTQFP
Package Size: mm2:W x L32TQFP: 49 mm2: 7 x 7(TQFP) PKG
Power Consumption(Typ)85 mW
RatingCatalog
Reference ModeExt,Int
Resolution16 Bits
SINAD83 dB
SNR83 dB
Sample Rate (max)500kSPS SPS
Sample Rate(Max)0.5 MSPS
THD(Typ)-93 dB

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADS8323EVM
    ADS8323 Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)