Datasheet Texas Instruments ADS8411IBPFBR — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADS8411 |
| Numero de parte | ADS8411IBPFBR |
16 bits, 2MSPS ADC con salida paralela P8 / P16, reloj interno y referencia interna 48-TQFP -40 a 85
Hojas de datos
16-Bit, 2 MSPS, Unipolar Input, Micropower Sampling Analog to Digital Converter datasheet
PDF, 1.5 Mb, Revisión: B, Archivo publicado: dic 17, 2004
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 48 | 48 |
| Package Type | PFB | PFB |
| Industry STD Term | TQFP | TQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 1000 | 1000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | B | ADS8411I |
| Width (mm) | 7 | 7 |
| Length (mm) | 7 | 7 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Descargar | Descargar |
Paramétricos
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | 4.75 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.25 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 2.5 +/-LSB |
| Input Range(Max) | 4.1 V |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | Oscillator |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 155 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 16 Bits |
| SINAD | 85 dB |
| SNR | 86 dB |
| Sample Rate (max) | 2MSPS SPS |
| Sample Rate(Max) | 2 MSPS |
| THD(Typ) | -90 dB |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- Using ADS8411/2 (16-Bit 2MSPS SAR) as a Serial ADCPDF, 438 Kb, Archivo publicado: mayo 24, 2004
This application report discusses how to use a parallel ADC as a serial ADC by using a low-cost CPLD. This concept is tested with a Texas Instruments ADS8411/12 (16-bit, 2 MSPS SAR ADC) and an Altera(TM) MAX 3000A CPLD. A full solution with a schematic, layout, and software for programming the CPLD is presented at the end of the report. - Interfacing the ADS8401/ADS8411 to TMS320C6713 DSPPDF, 260 Kb, Archivo publicado: sept 23, 2004
This application report presents a solution for interfacing the ADS8401 and ADS8411 16-bit, parallel interface converters to the TMS320C6713 DSP. The hardware solution consists of existing hardware, specifically the ADS8411EVM, 'C6713 DSK, and 5-6K interface board. The software demonstrates how to use an EDMA ping-pong buffer and Timer1 peripherals to collect data at 2 MSPS. Discussed also are som - Accurately measuring ADC driving-circuit settling time (Rev. A)PDF, 107 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
- Using ADS8411 in a Multiplexed Analog Input Application (Rev. A)PDF, 2.1 Mb, Revisión: A, Archivo publicado: feb 15, 2006
This application report is intended as a guide for using an analog multiplexer to multiplex several input signals to a single high-resolution, high-speed SAR analog-to-digital converter (ADC). The ADC and the multiplexer used were the ADS8411 and the TS5A3159/3359, respectively. This document discusses the important parameters of a multiplexer and defines a few important measurements for evaluatin - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Linea modelo
Serie: ADS8411 (3)
- ADS8411IBPFBR ADS8411IBPFBT ADS8411IPFBT
Clasificación del fabricante
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)