Datasheet Texas Instruments TLC5510INSLE — Ficha de datos

FabricanteTexas Instruments
SerieTLC5510
Numero de parteTLC5510INSLE
Datasheet Texas Instruments TLC5510INSLE

8 bits, 20 MSPS ADC Single Ch., S&H interno, baja potencia 24-SO -20 a 75

Hojas de datos

8-Bit High-Speed Analog-to-Digital Converters datasheet
PDF, 892 Kb, Revisión: L, Archivo publicado: jun 11, 2003
Extracto del documento

Precios

Estado

Estado del ciclo de vidaObsoleto (El fabricante ha interrumpido la producción del dispositivo)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin24
Package TypeNS
Industry STD TermSOP
JEDEC CodeR-PDSO-G
Width (mm)5.3
Length (mm)15
Thickness (mm)1.95
Pitch (mm)1.27
Max Height (mm)2
Mechanical DataDescargar

Reemplazos

ReplacementTLC5510INSR
Replacement CodeS

Paramétricos

# Input Channels1
Analog Input BW(MHz)14
Approx. Price (US$)2.59 | 1ku
ArchitectureFlash
DNL(Max)(+/-LSB)0.75
INL(Max)(+/-LSB)1
Input BufferNo
Input Range+2V
InterfaceParallel CMOS
Operating Temperature Range(C)-20 to 75
Package GroupSO
Package Size: mm2:W x L (PKG)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)
Power Consumption(Typ)(mW)127.5
RatingCatalog
Reference ModeExt
Resolution(Bits)8
SFDR(dB)42
SNR(dB)46
Sample Rate(Max)(MSPS)20

Plan ecológico

RoHSDesobediente
Pb gratisNo

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: TLC5510EVM
    TLC5510 Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200EVM: Low Cost Portable Power Supply
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Interfacing the TLC5510 Analog-to-Digital Converter to the TMS320C203 DSP
    PDF, 401 Kb, Archivo publicado: abr 27, 2000
    This application report is a summary of the application note titled Interfacing the TLC5510 Analog-to-Digital Converter to the TMS320C203 DSP (literature number SLAA029) that presents guidelines for interfacing the TI TLC5510 analog-to-digital converter (ADC) to the TI TMS320C203 DSP. The TLC5510 is a CMOS, 8-bit, 20 MSPS (megasamples per second) ADC utilizing a semi-flash architecture. The TLC551
  • Interfacing the TLC5510 Analog-to-Digital Converter to the TMS320C203 DSP
    PDF, 540 Kb, Archivo publicado: feb 1, 1998
    This application report presents guidelines for interfacing the Texas Instruments (TI(TM)) TLC5510 8-bit parallel-output analog-to-digital converter (ADC) to the TI TMS320C203 DSP data bus. The 8-bit ADC operates at a rate of 20 MHz. The C callable application program (assembly code) used to initialize the TMS320C203 and execute the code is also discussed.This report serves as reference inform
  • Interfacing A/D Converters TLC5540/10 to the DSKplus DSP Starter Kit TMS320C54x
    PDF, 206 Kb, Archivo publicado: abr 1, 1997
    This Application Note describes the construction of a test circuit using the A/D converters TLC5540 and TLC5510, and alternative ways of interfacing these converters to the DSKplus DSP starter kit TMS320C54x. Details are given of the test circuit of the TLC5540/10 and of the interface, and the programming of the digital signal processor TMS320C54x is also described.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog to Digital Converter > High Speed ADC (>10MSPS)