Datasheet Avago Technologies ACPL-798J-000E — Ficha de datos

ACPL-798J Optically Isolated Sigma-Delta Modulator with LVDS Interface Data Sheet
Lead (Pb) Free RoHS 6 fully compliant
RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description
The ACPL-798J is a 1-bit, second-order sigma-delta (-) modulator that oversamples an analog input signal into a highspeed data stream with galvanic isolation based on optical coupling technology. The ACPL-798J operates from a 5 V power supply with dynamic range of 82 dB with an appropriate digital filter. The differential inputs of ±200 mV (full scale ±320 mV) are ideal for direct connection to shunt resistors or other low-level signal sources in applications such as motor phase current measurement. The analog input is continuously sampled by means of sigma-delta over-sampling using external clock, coupled across the isolation barrier, which allows synchronous operation with any digital controller. The signal information is contained in the modulator data, as a density of ones with data rate up to 25 MHz, and the data are encoded and transmitted across the isolation boundary where they are recovered and decoded into high-speed data stream of digital ones and zeros. The original signal information can be reconstructed with a digital filter. The ACPL-798J comes with an LVDS interface on both clock inputs and data outputs for better signal integrity. Combined with superior optical coupling technology, the modulator delivers high noise margins and excellent immunity against isolation-mode transients. With 0.5 mm minimum distance through insulation (DTI), the ACPL-798J provides reliable double protection and high working insulation voltage, which is suitable for fail-safe designs. This outstanding isolation performance is superior to alternatives including devices based on capacitive or magnetic-coupling with DTI in micro-meter range. Offered in an SO-16 package, the isolated ADC delivers the reliability, small size, superior isolation and over-temperature performance motor drive designers need to accurately measure current at much lower price compared to traditional current transducers. Features Up to 25 MHz external clock input range LVDS clock and data interface. 1-bit, second-order sigma-delta modulator 16 bits resolution no missing codes (12 bits ENOB) 75dB Typical SNDR 3.5mV/°C maximum offset drift ±1% maximum gain error ±200 mV linear range with single 5 V supply ­40°C to +105°C operating temperature range SO-16 package 25 kV/ms common-mode transient immunity Safety and regulatory approval (pending): IEC/EN/DIN EN 60747-5-5: 1414 Vpeak working insu …